Conventional methods of fabricating integrated electronic circuits set all internal circuit connections during the manufacturing process. However, because of high development costs and high manufacturing tooling costs of such circuits, new designs are emerging that permit a user to configure or program integrated circuits for specific applications in the field after their purchase. Such circuits are called user-programmable circuits, and they permit a user to program the electrical connections of the circuit by either selectively opening or closing a series of programmable links. The programmable links are electrical interconnects that are electronically forced electrically open or closed at selectable nodes in the circuit by the user after the integrated circuit has been packaged.
An antifuse, which is one type of programmable link, permits a user to program the integrated circuit by creating a short between two conductors to which the originally open antifuse connects. Antifuses consist typically of two conductor or semiconductor elements that have a dielectric or insulating material sandwiched between them. During programming, the dielectric is broken down at selected points between the conductive elements by a current developed from a predetermined programming voltage applied to the conductive elements of selected links. This electrically connects the conducting or semiconducting elements to the conductive elements.
One type of user-programmable circuit known as a field programmable gate array (hereinafter FPGA) uses an interlayer of amorphous silicon (hereinafter .alpha.-Si) sandwiched between two metal layers. The metal layers are inert and form a diffusion barrier for the .alpha.-Si. The barrier prohibits interdiffusion of metal and .alpha.-Si at the contact interfaces during the high temperature fabrication process. Refractory metals such as TiW, W, or TiN are prime examples of the barrier metals. However, in order to form a metal/.alpha.-Si/metal antifuse with reproducible electrical characteristics, it is necessary to remove the unwanted native interface layer of the contact through sputter cleaning the metal and .alpha.-Si. This is done immediately prior to deposits of .alpha.-Si and metal. Sintering the antifuse at high temperatures is the next step. Meanwhile, when the antifuse is programmed, it is necessary that sufficient reaction and interdiffusion of the metal and .alpha.-Si occur in order to form a low-resistance and stable fused link.
The conventional use of barrier metal such as TiW requires at least the sputter cleaning of .alpha.-Si prior to the deposition of the top metal. Thereafter, a high temperature annealing process occurs (e.g., at temperatures near or in excess of 450.degree. C.) to react the TiW top metal to the .alpha.-Si of the antifuse. There are numerous limitations associated with this type of process.
The sputtering process and the high temperatures of the annealing process stress the antifuse and adversely affect its final operation. Sputter cleaning of the antifuse at the scale of the antifuse is a somewhat uncontrolled process that often causes corner thinning of the antifuse vias, as shown in FIG. 1a. FIG. 1b shows the cross section of the antifuse without sputter clean. The thickness of the .alpha.-Si at the center of via is 1250 A and at the corner 1060 .ANG.. FIG. 1b shows corner thinning of .alpha.-Si after sputter cleaning at 1KW of RF power. The thickness of .alpha.-Si at the center is 500 .ANG. and at the corner 250 .ANG.. This often results in a non-uniform breakdown voltage of the antifuse and a lack of symmetry in the antifuse current polarity. At best, the process window for sputter cleaning is critical. The high temperature process that anneals the TiW top layer has the adverse effect of causing excessive outleakage or outdiffusion of hydrogen in the .alpha.-Si. The result of the excessive hydrogen outdiffusion is increased leakage current of the unprogrammed antifuse and increased defect density of the .alpha.-Si due to loss of hydrogen to passivate the Si dangling bonds. In addition, the use of barrier metal such as TiW limits the fusing of the metal with the .alpha.-Si during programming, resulting in higher fused resistance or higher programming current, which limits the speed of the circuit operation or the packing density of the circuit. Insufficient fusing reaction between the .alpha.-Si and the metal will also lead to instability (switching off or increase) of the fuse link resistance.